The present invention relates to a flying capacitor battery voltage detecting apparatus.
A flying capacitor voltage detecting circuit is known as a voltage detecting apparatus preferably applicable to a combination battery which includes a plurality of battery modules, each including a single or a plurality of serially connected cells, which are arranged in series. This flying capacitor voltage detecting circuit performs the voltage read-in processing for sample holding the voltage of a voltage source in a flying capacitor in response to turning-on of an input side sampling switch and the voltage read-out processing for applying a charged voltage of the flying capacitor between a pair of input terminals of a differential amplification circuit by turning on an output side sampling switch after the input side sampling switch is turned off.
Nowadays, a digital signal processing based on a microcomputer or a comparable processor is generally used in the computation processing for a detected module voltage of the combination battery. And, it is necessary to cause an A/D converter to execute the A/D conversion applied to the analog output voltage produced from the differential amplification circuit and also cause a microcomputer-based battery controller to read the A/D converted data in a time sequential fashion.
Namely, the module voltage detection using a flying capacitor voltage detecting circuit necessarily requires the voltage read-in processing, the voltage read-out processing, the A/D conversion processing, and the data transfer processing for transferring the digital voltage signal to a data memory of the microcomputer, as described above, for each of the battery modules.
In this case, the A/D conversion processing is an operation for sample holding the analog output voltage of the differential amplification circuit at the designated sample hold timing and executing the A/D conversion of the sampled voltage, and then holding a produced digital voltage signal until a succeeding digital voltage signal is produced. The data transfer processing is an operation for supplying the digital voltage signal being held at an output section of the A/D converter into an input port of the microcomputer and for storing the readout voltage data in a predetermined memory area of the microcomputer. The A/D converter needs to successively execute the A/D conversion applied to the module voltage produced from the differential amplification circuit. The microcomputer needs to successively write the digital voltage signal appearing at the output section of the A/D converter into its memory area.
However, hybrid vehicles, motor-driven vehicles, fuel-cell vehicles are equipped with a combination battery generally consisting of several hundreds of cells being connected in series. The combination battery is generally divided into several tens or several hundreds of battery modules. As a result, to accomplish the voltage detection of the combination battery entirely, each battery module needs to execute the above-described voltage read-in processing, the voltage read-out processing, the A/D conversion processing, and the data transfer processing to the data memory of the microcomputer at appropriate timings.
If the module voltage detecting operations of respective battery modules are executed in parallel with each other, the processing time will be substantially extendable. However, the scale for such a circuit will become too big to realize. Accordingly, it is usual that the input side sampling switch of a flying capacitor voltage detecting circuit is constituted by a multiplexer so that several tens or several hundreds of module voltages can be read into a single or a plurality of flying capacitors in a time sequential manner.
However, using the multiplexer serving as an input side sampling switch will complicate the above-described voltage read-in processing due to necessary switching control for the multiplexer. The time sequential control of various portions of the voltage detecting apparatus of a combination battery will become further complicated. The processing time available for each module voltage will be greatly reduced. As a result, the allocated time for the voltage read-in processing (i.e., the essential CR charging operation) becomes short. In other words, the flying capacitor will not be saturated with charging. It becomes difficult to accurately execute the voltage read-in processing. Furthermore, the computation load of the microcomputer will become large. The microcomputer will be subjected to the incoming noises accompanying the complicated and speedy switching controls of various portions. Due to adverse influence of the noises, the control timings will be so asynchronous to result in erroneous detection.
To solve this problem, the Japanese Patent Application Laid-open No. 2002-156392 proposes a parallel read-in system including a plurality of flying capacitors arranged in parallel to each other to read module voltages through a multiplexer. However, if the number of flying capacitors and the A/D converters is not increased, a multiplexer serving as an output side sampling switch will be necessary for the voltage read-out processing. The switching control, i.e., timing control, of a circuit system is not simple. The microcomputer will be still bothered with a large processing or computation burden for the A/D conversion processing and the storage processing. In this manner, to reduce the adverse influence of dispersion in switching control timings as well as asynchronism of A/D operation timings, the microcomputer is given a large burden for timing controls.